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  5 kv rms quad-channel digital isolators ADUM4400/adum4401/adum4402 features enhanced system-level esd performance per iec 61000-4-x safety and regulatory approvals ul recognition 5000 v rms for 1 minute (double protection) csa component acceptance notice #5a (pending) iec 60950-1: 600 v rms (reinforced) iec 60601-1: 250 v rms (reinforced) vde certificate of conformity (pending) din v vde v 0884-10 (vde v 0884-10):2006-12 v iorm = 846 v peak (reinforced) low power operation 5 v operation 1.4 ma per channel maximum @ 0 mbps to 2 mbps 4.3 ma per channel maximum @ 10 mbps 34 ma per channel maximum @ 90 mbps 3 v operation 0.9 ma per channel maximum @ 0 mbps to 2 mbps 2.4 ma per channel maximum @ 10 mbps 20 ma per channel maximum @ 90 mbps bidirectional communication 3 v/5 v level translation high temperature operation: 105c high data rate: dc to 90 mbps (nrz) precise timing characteristics 2 ns maximum pulse width distortion 2 ns maximum channel-to-channel matching high common-mode transient immunity: >25 kv/s output enable function 16-lead soic wide body package (rohs-compliant) applications general-purpose, high voltage, multichannel isolation medical equipment motor drives power supplies general description the adum440x 1 are 4-channel digital isolators based on the analog devices, inc., i coupler? technology. combining high speed cmos and monolithic air core transformer technology, these isolation components provide outstanding performance characteristics that are superior to the alternatives, such as optocoupler devices and other integrated couplers. the adum440x isolators provide four independent isolation channels in a variety of channel configurations and data rates (see the ordering guide). all models operate with the supply voltage on either side ranging from 2.7 v to 5.5 v, providing compatibility with lower voltage systems as well as enabling a voltage translation functionality across the isolation barrier. the adum440x isolators have a patented refresh feature that ensures dc correctness in the absence of input logic transitions and during power-up/power-down conditions. this family of isolators, like many analog devices isolators, offers very low power consumption, consuming one-tenth to one-sixth the power of comparable isolators at comparable data rates up to 10 mbps. all models of the adum440x provide low pulse width distortion (<2 ns for c grade). in addition, every model has an input glitch filter to protect against extraneous noise disturbances. the adum440x contain circuit and layout enhancements to help achieve system-level iec 61000-4-x compliance (esd/burst/surge). the precise capability in these tests for the adum440x are strongly determined by the design and layout of the users board or module. for more information, see the an-793 application note, esd/latch-up considerations with icoupler isolation products . 1 protected by u.s. patents 5,952,849; 6,873,065; and 7,075,329. other patents pending. functional block diagrams encode decode encode decode encode decode encode decode v dd1 gnd 1 v ia v ib v ic v id nc gnd 1 v dd2 gnd 2 v oa v ob v oc v od v e2 gnd 2 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 08157-001 ADUM4400 figure 1. ADUM4400 decode encode encode decode encode decode encode decode v dd1 gnd 1 v ia v ib v ic v od v e1 gnd 1 v dd2 gnd 2 v oa v ob v oc v id v e2 gnd 2 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 08157-002 adum4401 figure 2. adum4401 decode encode decode encode encode decode encode decode v dd1 gnd 1 v ia v ib v oc v od v e1 gnd 1 v dd2 gnd 2 v oa v ob v ic v id v e2 gnd 2 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 08157-003 adum4402 figure 3. adum4402 rev. 0 information furnished by analog devices is believed to be accurate and reliable. however, no responsibility is assumed by analog devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. specifications subject to change without notice. no license is granted by implication or otherwise under any patent or patent rights of analog devices. trademarks and registered trademarks are the property of their respective owners. one technology way, p.o. box 9106, norwood, ma 02062-9106, u.s.a. tel: 781.329.4700 www.analog.com fax: 781.461.3113 ?2009 analog devices, inc. all rights reserved.
ADUM4400/adum4401/adum4402 rev. 0 | page 2 of 20 table of contents features .............................................................................................. 1 ? applications ....................................................................................... 1 ? general description ......................................................................... 1 ? functional block diagrams ............................................................. 1 ? revision history ............................................................................... 2 ? specifications ..................................................................................... 3 ? electrical characteristics5 v operation................................ 3 ? electrical characteristics3 v operation................................ 4 ? electrical characteristicsmixed 5 v/3 v operation ............ 5 ? electrical characteristicsmixed 3 v/5 v operation ............ 6 ? package characteristics ............................................................... 7 ? regulatory information ............................................................... 7 ? insulation and safety-related specifications ............................ 7 ? din v vde v 0884-10 (vde v 0884-10) insulation characteristics (pending) ............................................................ 8 ? recommended operating conditions .......................................8 ? absolute maximum ratings ............................................................9 ? esd caution...................................................................................9 ? pin configurations and function descriptions ......................... 10 ? typical performance characteristics ........................................... 13 ? applications information .............................................................. 15 ? pc board layout ........................................................................ 15 ? system-level esd considerations and enhancements ........ 15 ? propagation delay-related parameters ................................... 15 ? dc correctness and magnetic field immunity ..................... 15 ? power consumption .................................................................. 16 ? insulation lifetime ..................................................................... 17 ? outline dimensions ....................................................................... 18 ? ordering guide .......................................................................... 18 ? revision history 4/09revision 0: initial version
ADUM4400/adum4401/adum4402 rev. 0 | page 3 of 20 specifications electrical characteristics5 v operation all typical specifications are at t a = 25c, v dd1 = v dd2 = 5 v. minimum/maximum specifications apply over the entire recommended operation range of 4.5 v v dd1 5.5 v, 4.5 v v dd2 5.5 v, and ?40c t a 105c, unless otherwise noted. switching specifications are tested with c l = 15 pf and cmos signal levels, unless otherwise noted. table 1. parameter symbol a grade b grade c grade unit test conditions min typ max min typ max min typ max switching specifications data rate 1 10 90 mbps within pwd limit propagation delay t phl, t plh 50 65 100 20 32 50 18 27 32 ns 50% input to 50% output pulse width distortion pwd 40 3 0.5 2 ns |t plh ? t phl | change vs. temperature 11 5 3 ps/c pulse width pw 1000 100 8.3 11.1 ns within pwd limit propagation delay skew t psk 50 15 10 ns between any two units channel matching codirectional t pskcd 50 3 2 ns opposing-direction t pskod 50 6 5 ns 7 codirectional channel matching is the absolute value of the difference in propagation delays between any two channels with inp uts on the same side of the isolation barrier. opposing-directional channel matching is the absolute value of the difference in propagation delays between any two channels with inputs on opposing sides of the isolation barrier. table 2. parameter symbol 1 mbpsa, b, c grades 10 mbpsb, c grades 90 mbpsc grade unit test conditions min typ max min typ max min typ max supply current ADUM4400 i dd1 2.9 3.5 9.0 11.6 72 100 ma i dd2 1.2 1.9 3.0 5.5 19 36 ma adum4401 i dd1 2.5 3.2 7.4 10.6 59 82 ma i dd2 1.6 2.4 4.4 6.5 32 46 ma adum4402 i dd1 2.0 2.8 6.0 7.5 51 62 ma i dd2 2.0 2.8 6.0 7.5 51 62 ma table 3. for all models parameter symbol min typ max unit test conditions dc specifications logic high input threshold v ih 2.0 v logic low input threshold v il 0.8 v logic high output voltage v oh v ddx ? 0.1 v ddx ? 0.4 5.0 4.8 v v i ox = ?20 a, v ix = v ixh i ox = ?4 ma, v ix = v ixh input current per channel i i ?10 +0.01 +10 a 0 v v i x v ddx supply current per channel quiescent input supply current i ddi(q) 0.57 0.83 ma quiescent output supply current i ddo(q) 0.23 0.35 ma dynamic input supply current i ddi(d) 0.20 ma/mbps dynamic output supply current i ddo(d) 0.05 ma/mbps ac specifications output rise/fall time t r /t f 2.5 ns 10% to 90% common-mode transient immunity 1 |cm| 25 35 kv/s v ix = v ddx , v cm = 1000 v, transient magnitude = 800 v output disable propagation delay t phz ,t plh 6 8 ns high/low-to-high impedance output enable propagation delay t pzh ,t pzl 6 8 ns high impedance-to-high/low refresh rate f r 1.2 mbps 1 |cm| is the maximum common-mode vo ltage slew rate that can be sustained while maintaining v o > 0.8 v dd . the common-mode voltage slew rates apply to both rising and falling common-mode voltage edges.
ADUM4400/adum4401/adum4402 rev. 0 | page 4 of 20 electrical characteristics3 v operation all typical specifications are at t a = 25c, v dd1 = v dd2 = 3.0 v. minimum/maximum specifications apply over the entire recommended operation range: 2.7 v v dd1 3.6 v, 2.7 v v dd2 3.6 v, and ?40c t a 105c, unless otherwise noted. switching specifications are tested with c l = 15 pf and cmos signal levels, unless otherwise noted. table 4. parameter symbol a grade b grade c grade unit test conditions min typ max min typ max min typ max switching specifications data rate 1 10 90 mbps within pwd limit propagation delay t phl , t plh 50 75 100 20 38 50 20 34 45 ns 50% input to 50% output pulse width distortion pwd 40 3 0.5 2 ns |t plh ? t phl | change vs. temperature 11 5 3 ps/c pulse width pw 1000 100 8.3 11.1 ns within pwd limit propagation delay skew t psk 50 22 16 ns between any two units channel matching codirectional t pskcd 50 3 2 ns opposing-direction t pskod 50 6 5 ns 7 codirectional channel matching is the absolute value of the difference in propagation delays between any two channels with inp uts on the same side of the isolation barrier. opposing-directional channel matching is the absolute value of the difference in propagation delays between any two channels with inputs on opposing sides of the isolation barrier. table 5. parameter symbol 1 mbpsa, b, c grades 10 mbpsb, c grades 90 mbpsc grade unit test conditions min typ max min typ max min typ max supply current ADUM4400 i dd1 1.6 2.1 4.8 7.1 37 54 ma i dd2 0.7 1.2 1.8 2.3 11 15 ma adum4401 i dd1 1.4 1.9 0.1 5.6 31 44 ma i dd2 0.9 1.5 2.5 3.3 17 24 ma adum4402 i dd1 1.2 1.7 3.3 4.4 24 39 ma i dd2 1.2 1.7 3.3 4.4 24 39 ma table 6. for all models parameter symbol min typ max unit test conditions dc specifications logic high input threshold v ih 1.6 v logic low input threshold v il 0.4 v logic high output voltage v oh v ddx ? 0.1 v ddx ? 0.4 3.0 2.8 v v i ox = ?20 a, v ix = v ixh i ox = ?4 ma, v ix = v ixh input current per channel i i ?10 +0.01 +10 a 0 v v i x v ddx supply current per channel quiescent input supply current i ddi(q) 0.31 0.49 ma quiescent output supply current i ddo(q) 0.19 0.27 ma dynamic input supply current i ddi(d) 0.10 ma/mbps dynamic output supply current i ddo(d) 0.03 ma/mbps ac specifications output rise/fall time t r /t f 3 ns 10% to 90% common-mode transient immunity 1 |cm| 25 35 kv/s v ix = v ddx , v cm = 1000 v, transient magnitude = 800 v output disable propagation delay t phz ,t plh 6 8 ns high/low-to-high impedance output enable propagation delay t pzh ,t pzl 6 8 ns high impedance-to-high/low refresh rate f r 1.2 mbps 1 |cm| is the maximum common-mode vo ltage slew rate that can be sustained while maintaining v o > 0.8 v dd . the common-mode voltage slew rates apply to both rising and falling common-mode voltage edges.
ADUM4400/adum4401/adum4402 rev. 0 | page 5 of 20 electrical characteristicsmixed 5 v/3 v operation all typical specifications are at t a = 25c, v dd1 = 5 v, v dd2 = 3.0 v. minimum/maximum specifications apply over the entire recommended operation range: 4.5 v v dd1 5.5 v, 2.7 v v dd2 3.6 v, and ?40c t a 105c, unless otherwise noted. switching specifications are tested with c l = 15 pf and cmos signal levels, unless otherwise noted. table 7. 7 codirectional channel matching is the absolute value of the difference in propagation delays between any two channels with inp uts on the same side of the isolation barrier. opposing-directional channel matching is the absolute value of the difference in propagation delays between any two channels with inputs on opposing sides of the isolation barrier. parameter symbol a grade b grade c grade unit test conditions min typ max min typ max min typ max switching specifications data rate 1 10 90 mbps within pwd limit propagation delay t phl , t plh 50 70 50 15 35 50 20 30 40 ns 50% input to 50% output pulse width distortion pwd 40 3 0.5 2 ns |t plh ? t phl | change vs. temperature 11 5 3 ps/c pulse width pw 1000 100 8.3 11.1 ns within pwd limit propagation delay skew t psk 50 22 14 ns between any two units channel matching codirectional t pskcd 50 3 2 ns opposing-direction t pskod 50 6 5 ns table 8. parameter symbol 1 mbpsa, b, c grades 10 mbpsb, c grades 90 mbpsc grade unit test conditions min typ max min typ max min typ max supply current ADUM4400 i dd1 2.9 3.5 9.0 11.6 72 100 ma i dd2 0.7 1.2 1.8 2.3 11 15 ma adum4401 i dd1 2.5 3.2 7.4 10.6 59 82 ma i dd2 0.9 1.5 2.5 3.3 17 24 ma adum4402 i dd1 2.0 2.8 6.0 7.5 46 62 ma i dd2 1.2 1.7 3.3 4.4 24 39 ma table 9. for all models parameter symbol min typ max unit test conditions dc specifications logic high input threshold v ih 2.0 v logic low input threshold v il 0.8 v logic high output voltage v oh v ddx ? 0.1 v ddx ? 0.4 3.0 2.8 v v i ox = ?20 a, v ix = v ixh i ox = ?4 ma, v ix = v ixh input current per channel i i ?10 +0.01 +10 a 0 v v i x v ddx supply current per channel quiescent input supply current i ddi(q) 0.57 0.83 ma quiescent output supply current i ddo(q) 0.29 0.27 ma dynamic input supply current i ddi(d) 0.20 ma/mbps dynamic output supply current i ddo(d) 0.03 ma/mbps ac specifications output rise/fall time t r /t f 3 ns 10% to 90% common-mode transient immunity 1 |cm| 25 35 kv/s v ix = v ddx , v cm = 1000 v, transient magnitude = 800 v output disable propagation delay t phz ,t plh 6 8 ns high/low-to-high impedance output enable propagation delay t pzh ,t pzl 6 8 ns high impedance-to-high/low refresh rate f r 1.2 mbps 1 |cm| is the maximum common-mode vo ltage slew rate that can be sustained while maintaining v o > 0.8 v dd . the common-mode voltage slew rates apply to both rising and falling common-mode voltage edges.
ADUM4400/adum4401/adum4402 rev. 0 | page 6 of 20 electrical characteristicsmixed 3 v/5 v operation all typical specifications are at t a = 25c, v dd1 = 3.0 v, v dd2 = 5 v. minimum/maximum specifications apply over the entire recommended operation range: 2.7 v v dd1 3.6 v, 4.5 v v dd2 5.5 v; and ?40c t a 105c, unless otherwise noted. switching specifications are tested with c l = 15 pf and cmos signal levels, unless otherwise noted. table 10. parameter symbol a grade b grade c grade unit test conditions min typ max min typ max min typ max switching specifications data rate 1 10 90 mbps within pwd limit propagation delay t phl , t plh 50 70 100 15 35 50 20 30 40 ns 50% input to 50% output pulse width distortion pwd 40 3 0.5 2 ns |t plh ? t phl | change vs. temperature 11 5 3 ps/c pulse width pw 1000 100 8.3 11.1 ns within pwd limit propagation delay skew t psk 50 22 14 ns between any two units channel matching codirectional t pskcd 50 3 2 ns opposing-direction t pskod 50 6 5 ns 7 codirectional channel matching is the absolute value of the difference in propagation delays between any two channels with inp uts on the same side of the isolation barrier. opposing-directional channel matching is the absolute value of the difference in propagation delays between any two channels with inputs on opposing sides of the isolation barrier. table 11. parameter symbol 1 mbpsa, b, c grades 10 mbps b, c grades 90 mbpsc grade unit test conditions min typ max min typ max min typ max supply current ADUM4400 i dd1 1.6 2.1 4.8 7.1 37 54 ma i dd2 1.2 1.9 3.0 5.5 19 36 ma adum4401 i dd1 1.4 1.9 4.1 5.6 31 44 ma i dd2 1.6 2.4 4.4 6.5 32 46 ma adum4402 i dd1 1.2 1.7 3.3 4.4 24 39 ma i dd2 2.0 2.8 6.0 7.5 46 62 ma table 12. for all models parameter symbol min typ max unit test conditions dc specifications logic high input threshold v ih 1.6 v logic low input threshold v il 0.4 v logic high output voltage v oh v ddx ? 0.1 v ddx ? 0.4 5.0 4.8 v v i ox = ?20 a, v ix = v ixh i ox = ?4 ma, v ix = v ixh input current per channel i i ?10 +0.01 +10 a 0 v v i x v ddx supply current per channel quiescent input supply current i ddi(q) 0.31 0.49 ma quiescent output supply current i ddo(q) 0.19 0.35 ma dynamic input supply current i ddi(d) 0.10 ma/mbps dynamic output supply current i ddo(d) 0.05 ma/mbps ac specifications output rise/fall time t r /t f 2.5 ns 10% to 90% common-mode transient immunity 1 |cm| 25 35 kv/s v ix = v ddx , v cm = 1000 v, transient magnitude = 800 v output disable propagation delay t phz ,t plh 6 8 ns high/low-to-high impedance output enable propagation delay t pzh ,t pzl 6 8 ns high impedance-to-high/low refresh rate f r 1.1 mbps 1 |cm| is the maximum common-mode vo ltage slew rate that can be sustained while maintaining v o > 0.8 v dd . the common-mode voltage slew rates apply to both rising and falling common-mode voltage edges.
ADUM4400/adum4401/adum4402 rev. 0 | page 7 of 20 package characteristics table 13. parameter symbol min typ max unit test conditions resistance (input to output) 1 r i-o 10 12 capacitance (input to output) 1 c i-o 2.2 pf f = 1 mhz input capacitance 2 c i 4.0 pf ic junction-to-case thermal resistance, side 1 jci 33 c/w thermocouple located at center of package underside ic junction-to-case thermal resistance, side 2 jco 28 c/w 1 device considered a 2-terminal device: pin 1, pin 2, pin 3, pin 4, pin 5, pin 6, pin 7, and pin 8 shorted together and pin 9, pin 10, pin 11, pin 12, pin 13, pin 14, pin 15, and pin 16 shorted together. 2 input capacitance is from any input data pin to ground. regulatory information the adum440x are approved by the organizations listed in table 14 . refer to table 19 and the insulation lifetime section for details regarding recommended maximum working voltages for specific cross-isolation waveforms and insulation levels. table 14. ul (pending) csa (pending) vde (pending) recognized under 1577 component recognition program 1 approved under csa component acceptance notice #5a certified according to din v vde v 0884-10 (vde v 0884-10):2006-12 2 double/reinforced insulation, 5000 v rms isolation voltage reinforced insulation per csa 60950-1-03 and iec 60950-1, 600 v rms (848 v peak) maximum working voltage reinforced insulation, 846 v peak reinforced insulation per iec 60601-1 250 v rms (353 v peak) maximum working voltage file e214100 file 205078 file 2471900-4880-0001 1 in accordance with ul 1577, each adum440x is proof tested by applying an insulation test vo ltage 6000 v rms for 1 sec (curre nt leakage detection limit = 10 a). 2 in accordance with din v vde v 0884-10, each adum440x is pr oof tested by applying an insulati on test voltage 1590 v peak for 1 sec (partial discharge detection limit = 5 pc). the * marking branded on the component designates din v vde v 0884-10 approval. insulation and safety-related specifications table 15. parameter symbol value unit conditions rated dielectric insulation voltage 5000 v rms 1 minute duration minimum external air gap (clearance) l(i01) 8.0 min mm measured from input termin als to output terminals, shortest distance through air minimum external tracking (creepage) l(i02) 8.0 min mm measured from input termin als to output terminals, shortest distance path along body minimum internal gap (internal clearance) 0.017 min mm insulation distance through insulation tracking resistance (comparative tracking index) cti >175 v din iec 112/vde 0303 part 1 isolation group iiia material group (din vde 0110, 1/89, table 1)
ADUM4400/adum4401/adum4402 rev. 0 | page 8 of 20 din v vde v 0884-10 (vde v 0884-10) insu lation characteri stics (pending) these isolators are suitable for reinforced electrical isolation only within the safety limit data. maintenance of the safety d ata is ensured by means of protective circuits. note that the * marking on packages denotes din v vde v 0884-10 approval for 846 v peak working voltage. table 16. description conditions symbol characteristic unit installation classification per din vde 0110 for rated mains voltage 300 v rms i to iv for rated mains voltage 450 v rms i to ii for rated mains voltage 600 v rms i to ii climatic classification 40/105/21 pollution degree (din vde 0110, table 1) 2 maximum working insulation voltage v iorm 846 v peak input-to-output test voltage, method b1 v iorm 1.875 = v pr , 100% production test, t m = 1 sec, partial discharge < 5 pc v pr 1590 v peak input-to-output test voltage, method a v pr after environmental tests subgroup 1 v iorm 1.6 = v pr , t m = 60 sec, partial discharge < 5 pc 1375 v peak after input and/or safety test subgroup 2 and subgroup 3 v iorm 1.2 = v pr , t m = 60 sec, partial discharge < 5 pc 1018 v peak highest allowable overvoltage transient overvoltage, t tr = 10 seconds v tr 6000 v peak safety-limiting values maximum value allowed in the event of a failure; see figure 4 case temperature t s 150 c side 1 current i s1 265 ma side 2 current i s2 335 ma insulation resistance at t s v io = 500 v r s >10 9 case temperature (c) safety-limiting current (ma) 0 0 350 300 250 200 150 100 50 50 100 150 200 side #1 side #2 08157-004 figure 4. thermal derating curve, dependence of safety limiting values with case temperature per din v vde v 0884-10 recommended operat ing conditions table 17. parameter symbol min max unit operating temperature t a ?40 +105 c supply voltages 1 v dd1 , v dd2 2.7 5.5 v input signal rise and fall times 1.0 ms 1 all voltages are relative to their respective ground. see the sectio n for information on immunity to external magnetic fields. dc correctness and magnetic field immunity
ADUM4400/adum4401/adum4402 rev. 0 | page 9 of 20 absolute maximum ratings table 18. parameter rating storage temperature (t st ) ?65c to +150c ambient operating temperature (t a ) ?40c to +105c supply voltages (v dd1 , v dd2 ) 1 ?0.5 v to +7.0 v input voltage (v ia , v ib , v ic , v id , v e1 , v e2 ) 1 , 2 ?0.5 v to v ddi + 0.5 v output voltage (v oa , v ob , v oc , v od ) 1 , 2 ?0.5 v to v ddo + 0.5 v average output current per pin 3 side 1 (i o1 ) ?18 ma to +18 ma side 2 (i o2 ) ?22 ma to +22 ma common-mode transients 4 ?100 kv/s to +100 kv/s 1 all voltages are relative to their respective ground. 2 v ddi and v ddo refer to the supply voltages on the input and output sides of a given channel, respectively. see the section. pc board layout 3 see for maximum rated curre nt values for various temperatures. figure 4 4 refers to common-mode transients across the insulation barrier. common- mode transients exceeding the abso lute maximum rating can cause latch- up or permanent damage. stresses above those listed under absolute maximum ratings may cause permanent damage to the device. this is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. esd caution table 19. maximum continuous working voltage 1 parameter max unit constraint ac voltage, bipolar waveform 565 v peak 50 year minimum lifetime ac voltage, unipolar waveform reinforced insulation 846 v peak maximum approved working voltage per iec 60950-1 and vde v 0884-10 dc voltage reinforced insulation 846 v peak maximum approved working voltage per iec 60950-1 and vde v 0884-10 1 refers to continuous voltage magnitude imposed across the isol ation barrier. see the insulation lifetime section for more deta ils. table 20. truth table (positive logic) v ix input 1 v ex input v ddi state 1 v ddo state 1 v ox output 1 notes h h or nc powered powered h l h or nc powered powered l x l powered powered z x h or nc unpowered powered h outputs re turn to input state within 1 s of v ddi power restoration. x l unpowered powered z x x powered unpowered indeterminate outputs return to input state within 1 s of v ddo power restoration if v ex state is h or nc. outputs return to high impedance state within 8 ns of v ddo power restoration if v ex state is l. 1 v ix and v ox refer to the input and output signals of a given channel (a, b, c, or d). v ex refers to the output enable signal on the same side as the v ox outputs. v ddi and v ddo refer to the supply voltages on the input and output sides of the given channel, respectively.
ADUM4400/adum4401/adum4402 rev. 0 | page 10 of 20 pin configurations and function descriptions 08157-005 v dd1 1 gnd 1 2 v ia 3 v ib 4 v dd2 16 gnd 2 15 v oa 14 v ob 13 v ic 5 v oc 12 v id 6 v od 11 nc 7 v e2 10 gnd 1 8 gnd 2 9 ADUM4400 top view (not to scale) notes 1. nc = no connec t 2 . pin 2 and pin 8 are internally connected, and connecting both to gnd 1 is recommended. 3 . pin 9 and pin 15 are internally connected, and connecting both to gnd 2 is recommended. figure 5. ADUM4400 pin configuration table 21. ADUM4400 pin function descriptions pin no. mnemonic description 1 v dd1 supply voltage for isolator side 1, 2.7 v to 5.5 v. 2 gnd 1 ground 1. ground reference for isolator side 1. 3 v ia logic input a. 4 v ib logic input b. 5 v ic logic input c. 6 v id logic input d. 7 nc no connect. 8 gnd 1 ground 1. ground reference for isolator side 1. 9 gnd 2 ground 2. ground reference for isolator side 2. 10 v e2 output enable 2. active high logic input. v ox outputs on side 2 are enabled when v e2 is high or disconnected. v ox side 2 outputs are disabled when v e2 is low. in noisy environments, connecting v e2 to an external logic high or low is recommended. 11 v od logic output d. 12 v oc logic output c. 13 v ob logic output b. 14 v oa logic output a. 15 gnd 2 ground 2. ground reference for isolator side 2. 16 v dd2 supply voltage for isolator side 2, 2.7 v to 5.5 v.
ADUM4400/adum4401/adum4402 rev. 0 | page 11 of 20 v dd1 1 gnd 1 2 v ia 3 v ib 4 v dd2 16 gnd 2 15 v oa 14 v ob 13 v ic 5 v oc 12 v od 6 v id 11 v e1 7 v e2 10 gnd 1 8 gnd 2 9 adum4401 top view (not to scale) 08157-006 notes 1. pin 2 and pin 8 are internally connected, and connecting both to gnd 1 is recommended. 2 . pin 9 and pin 15 are internally connected, and connecting both to gnd 2 is recommended. figure 6. adum4401 pin configuration table 22. adum4401 pin function descriptions pin no. mnemonic description 1 v dd1 supply voltage for isolator side 1, 2.7 v to 5.5 v. 2 gnd 1 ground 1. ground reference for isolator side 1. 3 v ia logic input a. 4 v ib logic input b. 5 v ic logic input c. 6 v od logic output d. 7 v e1 output enable. active high logic input. v ox side 1 outputs are enabled when v e1 is high or disconnected. v ox side 1 outputs are disabled when v e1 is low. in noisy environments, connecting v e1 to an external logic high or low is recommended. 8 gnd 1 ground 1. ground reference for isolator side 1. 9 gnd 2 ground 2. ground reference for isolator side 2. 10 v e2 output enable 2. active high logic input. v ox outputs on side 2 are enabled when v e2 is high or disconnected. v ox side 2 outputs are disabled when v e2 is low. in noisy environments, connecting v e2 to an external logic high or low is recommended. 11 v id logic input d. 12 v oc logic output c. 13 v ob logic output b. 14 v oa logic output a. 15 gnd 2 ground 2. ground reference for isolator side 2. 16 v dd2 supply voltage for isolator side 2, 2.7 v to 5.5 v.
ADUM4400/adum4401/adum4402 rev. 0 | page 12 of 20 v dd1 1 gnd 1 2 v ia 3 v ib 4 v dd2 16 gnd 2 15 v oa 14 v ob 13 v oc 5 v ic 12 v od 6 v id 11 v e1 7 v e2 10 gnd 1 8 gnd 2 9 adum4402 top view (not to scale) 08157-007 notes 1. pin 2 and pin 8 are internally connected, and connecting both to gnd 1 is recommended. 2. pin 9 and pin 15 are internally connected, and connecting both to gnd 2 is recommended. figure 7. adum4402 pin configuration table 23. adum4402 pin function descriptions pin no. mnemonic description 1 v dd1 supply voltage for isolator side 1, 2.7 v to 5.5 v. 2 gnd 1 ground 1. ground reference for isolator side 1. 3 v ia logic input a. 4 v ib logic input b. 5 v oc logic output c. 6 v od logic output d. 7 v e1 output enable 1. active high logic input. v ox side 1 outputs are enabled when v e1 is high or disconnected. v ox side 1 outputs are disabled when v e1 is low. in noisy environments, connecting v e1 to an external logic high or low is recommended. 8 gnd 1 ground 1. ground reference for isolator side 1. 9 gnd 2 ground 2. ground reference for isolator side 2. 10 v e2 output enable 2. active high logic input. v ox outputs on side 2 are enabled when v e2 is high or disconnected. v ox side 2 outputs are disabled when v e2 is low. in noisy environments, connecting v e2 to an external logic high or low is recommended. 11 v id logic input d. 12 v ic logic input c. 13 v ob logic output b. 14 v oa logic output a. 15 gnd 2 ground 2. ground reference for isolator side 2. 16 v dd2 supply voltage for isolator side 2, 2.7 v to 5.5 v.
ADUM4400/adum4401/adum4402 rev. 0 | page 13 of 20 typical performance characteristics data rate (mbps) current/channel (ma) 0 0 20 40 20 60 80 100 5v 3v 15 10 5 08157-008 figure 8. typical input supply current per channel vs. data rate (no load) data rate (mbps) current/channel (ma) 0 0 20 40 20 60 80 100 5v 3v 15 10 5 08157-009 figure 9. typical output supply curren t per channel vs. data rate (no load) data rate (mbps) current/channel (ma) 0 0 20 40 20 60 80 100 5v 3v 15 10 5 08157-010 figure 10. typical output su pply current per channel vs. data rate (15 pf output load) data rate (mbps) current (ma) 0 0 80 40 20 60 80 100 5v 3v 60 40 20 08157-011 figure 11. typical ADUM4400 v dd1 supply current vs. data rate for 5 v and 3 v operation data rate (mbps) current (ma) 0 0 80 40 20 60 80 100 5v 3v 60 40 20 08157-012 figure 12. typical ADUM4400 v dd2 supply current vs. data rate for 5 v and 3 v operation data rate (mbps) current (ma) 0 0 80 40 20 60 80 100 5v 3v 60 40 20 08157-013 figure 13. typical adum4401 v dd1 supply current vs. data rate for 5 v and 3 v operation
ADUM4400/adum4401/adum4402 rev. 0 | page 14 of 20 data rate (mbps) current (ma) 0 0 80 40 20 60 80 100 5v 3v 60 40 20 08157-014 figure 14. typical adum4401 v dd2 supply current vs. data rate for 5 v and 3 v operation data rate (mbps) current (ma) 0 0 80 40 20 60 80 100 5v 3v 60 40 20 08157-015 figure 15. typical adum4402 v dd1 or v dd2 supply current vs. data rate for 5 v and 3 v operation temperature (c) propagation delay (ns) ?50 ?25 25 30 35 40 05 0 7 5 25 100 3v 5v 08157-016 figure 16. propagation delay vs. temperature, c grade
ADUM4400/adum4401/adum4402 rev. 0 | page 15 of 20 in 15 e applications information pc board layout the adum440x digital isolators require no external interface circuitry for the logic interfaces. power supply bypassing is strongly recommended at the input and output supply pins (see figure 17 ). bypass capacitors are most conveniently connected between pin 1 and pin 2 for v dd1 and between p and pin 16 for v dd2 . the capacitor value should be between 0.01 f and 0.1 f. the total lead length between both ends of th capacitor and the input power supply pin should not exceed 20 mm. bypassing between pin 1 and pin 8 and between pin 9 and pin 16 should also be considered unless the ground pair on each package side are connected close to the package. v dd1 gnd 1 v ia v ib v ic/ v oc v id/ v od nc/v e1 gnd 1 v dd2 gnd 2 v oa v ob v oc/ v ic v od/ v id v e2 gnd 2 08157-017 figure 17. recommended printed circuit board layout in applications involving high common-mode transients, ensure that board coupling across the isolation barrier is minimized. furthermore, the board layout should be designed such that any coupling that does occur equally affects all pins on a given component side. failure to ensure this could cause voltage differentials between pins exceeding the absolute maximum ratings of the device, thereby leading to latch-up or permanent damage. system-level esd considerations and enhancements system-level esd reliability (for example, per iec 61000-4-x) is highly dependent on system design, which varies widely by application. the adum440x incorporate many enhancements to make esd reliability less dependent on system design. the enhancements include ? esd protection cells added to all input/output interfaces. ? key metal trace resistances reduced using wider geometry and paralleling of lines with vias. ? the scr effect, inherent in cmos devices, minimized by using guarding and isolation techniques between pmos and nmos devices. ? areas of high electric field concentration eliminated using 45 corners on metal traces. ? supply pin overvoltage prevented with larger esd clamps between each supply pin and its respective ground. while the adum440x improve system-level esd reliability, they are no substitute for a robust system-level design. see the an-793 application note, esd/latch-up considerations with icoupler isolation products , for detailed recommendations on board layout and system-level design. propagation delay-related parameters propagation delay is a parameter that describes the length of time for a logic signal to propagate through a component. the propagation delay to a logic low output can differ from the propagation delay to logic high. input ( v ix ) output (v ox ) t plh t phl 50% 50% 08157-018 figure 18. propagation delay parameters pulse width distortion is the maximum difference between these two propagation delay values and is an indication of how accurately the input signals timing is preserved. channel-to-channel matching refers to the maximum amount the propagation delay differs among channels within a single adum440x component. propagation delay skew refers to the maximum amount the propagation delay differs among multiple adum440x components operated under the same conditions. dc correctness and magnetic field immunity positive and negative logic transitions at the isolator input cause narrow (~1 ns) pulses to be sent via the transformer to the decoder. the decoder is bistable and is therefore either set or reset by the pulses, indicating input logic transitions. in the absence of logic transitions at the input for more than ~1 s, a periodic set of refresh pulses indicative of the correct input state are sent to ensure dc correctness at the output. if the decoder receives no internal pulses for more than approximately 5 s, the input side is assumed to be without power or nonfunctional; in which case, the isolator output is forced to a default state (see table 20 ) by the watchdog timer circ uit. the limitation on the adum440x magnetic field immunity is set by the condition in which induced voltage in the trans- formers receiving coil is large enough to either falsely set or reset the decoder. the following analysis defines the conditions under which this can occur. the 3 v operating condition of the adum440x is examined because it represents the most susceptible mode of operation.
ADUM4400/adum4401/adum4402 rev. 0 | page 16 of 20 the pulses at the transformer output have an amplitude greater than 1.0 v. the decoder has a sensing threshold at about 0.5 v, thereby establishing a 0.5 v margin in which induced voltages can be tolerated. the voltage induced across the receiving coil is given by v = (? d / dt )? r n 2 ; n = 1, 2,, n where: is the magnetic flux density (gauss). n is the number of turns in the receiving coil. r n is the radius of the n th turn in the receiving coil (cm). given the geometry of the receiving coil in the adum440x and an imposed requirement that the induced voltage be at most 50% of the 0.5 v margin at the decoder, a maximum allowable magnetic field is calculated as shown in figure 19 . magnetic field frequency (hz) 100 maximum allowable magnetic flux density (kgauss) 0.001 1m 10 0.01 1k 10k 10m 0.1 1 100m 100k 08157-019 figure 19. maximum allowable external magnetic flux density for example, at a magnetic field frequency of 1 mhz, the maximum allowable magnetic field of 0.2 kgauss induces a voltage of 0.25 v at the receiving coil. this is about 50% of the sensing threshold and does not cause a faulty output transition. similarly, if such an event were to occur during a transmitted pulse (and was of the worst-case polarity), it would reduce the received pulse from >1.0 v to 0.75 vstill well above the 0.5 v sensing threshold of the decoder. the preceding magnetic flux density values correspond to specific current magnitudes at given distances away from the adum440x transformers. figure 20 expresses these allowable current magnitudes as a function of frequency for selected distances. as can be seen, the adum440x are immune and can be affected only by extremely large currents operated at high frequency and very close to the component. for the 1 mhz example noted, one would have to place a 0.5 ka current 5 mm away from the adum440x to affect the components operation. magnetic field frequency (hz) maximum allowable current (ka) 1000 100 10 1 0.1 0.01 1k 10k 100m 100k 1m 10m distance = 5mm distance = 1m distance = 100mm 08157-020 figure 20. maximum allowable current for various current-to-adum440x spacings note that at combinations of strong magnetic field and high frequency, any loops formed by printed circuit board traces may induce sufficiently large error voltages to trigger the thresholds of succeeding circuitry. care should be taken in the layout of such traces to avoid this possibility. power consumption the supply current at a given channel of the adum440x isolator is a function of the supply voltage, the channels data rate, and the channels output load. for each input channel, the supply current is given by i ddi = i ddi (q) f 0.5 f r i ddi = i ddi (d) (2 f ? f r ) + i ddi (q) f > 0.5 f r for each output channel, the supply current is given by: i ddo = i ddo (q) f 0.5 f r i ddo = ( i ddo (d) + (0.5 10 ?3 ) c l v ddo ) (2 f ? f r ) + i ddo (q) f > 0.5 f r where: i ddi (d) , i ddo (d) are the input and output dynamic supply currents per channel (ma/mbps). c l is the output load capacitance (pf). v ddo is the output supply voltage (v). f is the input logic signal frequency (mhz, half of the input data rate, nrz signaling). f r is the input stage refresh rate (mbps). i ddi (q) , i ddo (q) are the specified input and output quiescent supply currents (ma).
ADUM4400/adum4401/adum4402 rev. 0 | page 17 of 20 to calculate the total i dd1 and i dd2 , the supply currents for each input and output channel corresponding to i dd1 and i dd2 are calculated and totaled. figure 8 and figure 9 provide per channel supply currents as a function of data rate for an unloaded output condition. figure 10 provides per channel supply current as a function of data rate for a 15 pf output condition. figure 11 through figure 15 provide total i dd1 and i dd2 as a function of data rate for ADUM4400/adum4401/ adum4402 channel configurations. in the case of unipolar ac or dc voltage, the stress on the insu- lation is significantly lower. this allows operation at higher working voltages while still achieving a 50-year service life. the working voltages listed in table 19 can be applied while maintaining the 50-year minimum lifetime, provided the voltage conforms to either the unipolar ac or dc voltage cases. any cross-insulation voltage waveform that does not conform to figure 22 or figure 23 should be treated as a bipolar ac waveform, and its peak voltage should be limited to the 50-year lifetime voltage value listed in table 19 . insulation lifetime note that the voltage presented in figure 22 is shown as sinusoidal for illustration purposes only. it is meant to represent any voltage waveform varying between 0 v and some limiting value. the limiting value can be positive or negative, but the voltage cannot cross 0 v. all insulation structures eventually break down when subjected to voltage stress over a sufficiently long period. the rate of insulation degradation is dependent on the characteristics of the voltage waveform applied across the insulation. in addition to the testing performed by the regulatory agencies, analog devices carries out an extensive set of evaluations to determine the lifetime of the insulation structure within the adum440x. 0v rated peak voltage 08157-021 analog devices performs accelerated life testing using voltage levels higher than the rated continuous working voltage. acceleration factors for several operating conditions are determined. these factors allow calculation of the time to failure at the actual working voltage. the values shown in table 19 summarize the peak voltage for 50 years of service life for a bipolar ac operating condition and the maximum csa/vde approved working voltages. in many cases, the approved working voltage is higher than the 50-year service life voltage. operation at these high working voltages can lead to shortened insulation life in some cases. figure 21. bipolar ac waveform 0v rated peak voltage 08157-022 figure 22. unipolar ac waveform 0v rated peak voltage 08157-023 the insulation lifetime of the adum440x depends on the voltage waveform type imposed across the isolation barrier. the i coupler insulation structure degrades at different rates, depending on whether the waveform is bipolar ac, unipolar ac, or dc. figure 21 , figure 22 , and figure 23 illustrate these different isolation voltage waveforms. figure 23. dc waveform bipolar ac voltage is the most stringent environment. the goal of a 50-year operating lifetime under the ac bipolar condition determines analog devices recommended maximum working voltage.
ADUM4400/adum4401/adum4402 rev. 0 | page 18 of 20 outline dimensions controlling dimensions are in millimeters; inch dimensions (in parentheses) are rounded-off millimeter equivalents for reference only and are not appropriate for use in design. compliant to jedec standards ms-013- aa 032707-b 10.50 (0.4134) 10.10 (0.3976) 0.30 (0.0118) 0.10 (0.0039) 2.65 (0.1043) 2.35 (0.0925) 10.65 (0.4193) 10.00 (0.3937) 7.60 (0.2992) 7.40 (0.2913) 0 . 7 5 ( 0 . 0 2 9 5 ) 0 . 2 5 ( 0 . 0 0 9 8 ) 45 1.27 (0.0500) 0.40 (0.0157) c oplanarity 0.10 0.33 (0.0130) 0.20 (0.0079) 0.51 (0.0201) 0.31 (0.0122) seating plane 8 0 16 9 8 1 1.27 (0.0500) bsc figure 24. 16-lead standard small outline package [soic_w] wide body (rw-16) dimensions shown in millimeters and (inches) ordering guide model number of inputs, v dd1 side number of inputs, v dd2 side maximum data rate (mbps) maximum propagation delay, 5 v (ns) maximum pulse width distortion (ns) temperature range package description package option ADUM4400arwz 1 , 2 4 0 1 100 40 ?40c to +105c 16-lead soic_w rw-16 ADUM4400brwz 1 , 2 4 0 10 50 3 ?40c to +105c 16-lead soic_w rw-16 ADUM4400crwz 1 , 2 4 0 90 32 2 ?40c to +105c 16-lead soic_w rw-16 adum4401arwz 1 , 2 3 1 1 100 40 ?40c to +105c 16-lead soic_w rw-16 adum4401brwz 1 , 2 3 1 10 50 3 ?40c to +105c 16-lead soic_w rw-16 adum4401crwz 1 , 2 3 1 90 32 2 ?40c to +105c 16-lead soic_w rw-16 adum4402arwz 1 , 2 2 2 1 100 40 ?40c to +105c 16-lead soic_w rw-16 adum4402brwz 1 , 2 2 2 10 50 3 ?40c to +105c 16-lead soic_w rw-16 adum4402crwz 1 , 2 2 2 90 32 2 ?40c to +105c 16-lead soic_w rw-16 1 tape and reel is available. the addi tion of an -rl suffix de signates a 13 (1,000 unit s) tape and reel option. 2 z = rohs compliant part.
ADUM4400/adum4401/adum4402 notes
ADUM4400/adum4401/adum4402 rev. 0 | page 20 of 20 notes ?2009 analog devices, inc. all rights reserved. trademarks and registered trademarks are the prop erty of their respective owners. d08157-0-4/09(0)


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